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TEA7063
SPEECH CIRCUIT WITH POWER MANAGEMENT
PRELIMINARY DATA
2/4 WIRES INTERFACE WITH - double antisidetone network - AC impedance externally programmable - Rx output dynamic programmable - AGC attack-disconnect points programmable ANTI-CLIPPING/ANTI DISTORTION CIRCUIT PROGRAMMABLE DTMF INTERFACE 3.3 VOLTS SUPPLY FOR MICROPROCESSOR OR DIALER EXTRA CURRENT SUPPLY PROGRAMMABLE FOR LOUD SPEAKER DC CHARACTERISTIC PROGRAMMABLE FOR ALL SPECIFICATION LOW CURRENT OPERATION DESCRIPTION The TEA7063 is designed to meet the different BLOCK DIAGRAM
DIP20
SO20
ORDERING NUMBERS: TEA7063FP TEA7063DP
worldwide specifications for telephone set in medium and high range equipments.
January 1994
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This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
TEA7063
PIN CONNECTION (Top view)
LONG LINE SIDETONE SHORT LINE SIDETONE IMPEDANCE BUFFER OUTPUT V-REF DTMF INPUT MICROPHONE INPUT I-REF I START SQUEEZING THRESHOLD
1 2 3 4 5 6 7 8 9 10
D93TL021
20 19 18 17 16 15 14 13 12 11
EARPHONE MICROCONTROLLER POWER SUPPLY NOISE FILTER V-CAPA V-LINE I SLOPE MIC/MIC-EARPHONE MUTE GND CURRENT SUPPLY FOR L.S. AMP SOFT-CLIPPING FILTER
ABSOLUTE MAXIMUM RATINGS
Symbol Max. Current DC (steady) Max. Voltage AC (steady) Max. Voltage AC + DC (steady) Max. Current (20ms) ONE SHOT Max. Voltage (20ms) ONE SHOT current < 1A Ptot TJ Total Power Dissipation Junction Temperature Parameter Value 150 7.5 9 1 12 1 130 Unit mA V V A V W C
MAXIMUM OPERATING CONDITION
Symbol VDC VAC IDC TOP DC Voltage AC Voltage DC Current Temperature Range Parameter Value 7 2.2 110 -20 to 70 Unit V Vp mA C
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TEA7063
TEST CIRCUIT
R4 = 75 R5 = 5.1K R6 = 22K R9 = 100K R11 = 140K R12 = 0
R13 R14 R15 R16 R17 R18
= 2.7K =0 = 140K = 2.7K = 1.8K = 560K
C1 C2 C3 C4 C5 C6
= 47F = 4.7F = 47F = 470nF = 100F = 47pF
C7 = 47pF C8 = 2.2nF C9 = 2.2nF C10 = 150nF
RLL = 150K RLS = 100K RST = 330K
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TEA7063
ELECTRICAL CHARACTERISTICS (Tamb = 25C; f = 1KHz; R9 = 100K; unless otherwise specified)
Symbol VC Iint Parameter Stabilized Voltage (pin 17) Internal Bias Current (pin 17) Test Condition IL = 25mA; R9 = 100K IL = 25mA IL = 25mA; R9 = 180K (V16 - R6*Iint +VC) IL = 25mA Min. 2.25 120 Typ. 2.5 140 105 1.2 3.3 Max. 2.75 160 Unit V A A V A V mA 1.5 0.85 80 IL = 25mA IL = 75mA ON OFF ON OFF V14 = 5V IL = 25mA Pin 14 > 1.6V IL = 25mA Vmic = -3dBm -GS Vmic = -3dBm -GS + 15dB 20 IL = 25mA 2K at Pins 5-7 IL = 25mA Pin 14 > 1.6V IL = 25mA IL = 25mA Vro = 500mV Vro = 630mV IL = 25mA IL = 25mA Pin = 14 > 2.7V IL = 25mA IL = 25mA Pin 14 > 2.7V IL = 25mA; R9 = 100K IL = 25mA; R9 = 180K VST = RST x IST 50 22 500 35.5 2.30 0 650 38.5 2.55 1.4 800 41.5 2.80 1 -74 60 29 -7 30 -6 31 -5 3 10 -74 41.5 -7 41.5 42.5 -6 42.5 10 50 1.6 0.25 2.7 0.25 110 12 57 0.8 2.1 20 43.5 -5 43.5 3 10 150 mA mA A mA mA V V V V A dB dB dB % % K dBm psoph dB dB dB % % dBmp dB dB dB mA A V
Vref Iref Vmp Icmp Ispm Iimp Iea Vmh Vmb Vmh Vmb Imleak GS AGCS Gmf THDS
Reference Voltage Current at Vref Stabilized Supply at pin 19 Charging Current at Pin 19 Static Current at Pin 19 Internal Consumption Supply Current for Parallel Circuits (pin 12) Mute Microphone (pin 14) Mute Earphone (pin 14) Mute Leakage Current (pin 14) Tx Gain Long Line DTMF Gain Tx Distortion
1.05 -100 3.1
1.35 +10 3.5
Pin 17 = GND IL = 25mA; R9 = 100K IL = 25mA; R9 = 180K
0.6 X Iline 1.1
Ze NTx RS Gr AGCr THD r
Microphone Impedance Tx Noise (psometric) Tx Attenuation in Mute Mode Rx Gain Long Line Line Lenght Rx Distortion
NRx Rr Gas Zac Grs IST VST
Rx Noise Rx Attenuation in Mute Mode Antisidetone AC Impedance Confidence Level = VLINE/VREC (in DTMF) Soft Clipping Current Level Control (pin 10) Control Voltage Range (Pin 10)
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CIRCUIT DESCRIPTION 1. DC CHARACTERISTICS 1.1 VC (pin 17) The stabilized voltage VC is connected to Vline (pin 16) through an internal shunt regulator T1, T2, which presents to the line a high AC impedance at frequecncies higher than 200Hz. At this purpose the value of C1 (at pin 17) must be not lower than 47F (suggested value is 100F). The shunt regulator, T1 and T2, also controls the extra current source, or power management, at pin 12 (see also paragraph 6). 1.2 VLINE (pin 16) The line voltage (pin 16) is determined by the value of the external resistor R6 and by the internal current, Iint, flowing between VC (pin 17) and Figure 1 Ground (see also paragr.: 1.1): VLINE = VC + R 6 x Iint VC is fixed by design at about 2.5V. Iint is reversely related to R9: Iint = 8 Volt/R9 + 60A at IL > 25mA Iint = 4 Volt/R9 + 60A at IL = 6mA where IL depends on ILB (see supply management) VLINE must be externally adjusted (with R6) to guarantee both DC and AC characteristic in accordance to the specific standard of the different adminastrations. Another adjustment of the DC characteristic is possible with R9. Increasing the value of R9 causes a decrease of Iint and consequently a reduction of the product Iint x R9. (see also Paragraph 7)
Figure 2
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2. TRANSMISSION CHAIN 2.1 A.G.C. In Transmission The transmission gain between Microphone Input (pin 7) and Vline (pin 16) is internally decreased of 6dB when the line current varies from ILL to ILS with a constant AC load of 600. The values of ILL (long line current) and ILS (short line current) are programmable through I-start (pin 9) and I-slope (pin 15) (see also paragr. 4). 2.2 Sending Impedance The impedance of the Output Stage Amplifier, Zout, is determined by the impedance Z4 (at pin 3). Zout = 10.65 xZ4 The total AC impedance shown to the line is the parallel Zpar = Z out//Zint//Zext where: - Zint = 10K//8.5 nF (internal) - Zext = R6//C4 (at pin 16) 2.3 Sending Mute In normal speech operation (Vmute at pin 14 < 0.8V), the signal at Microphone Input (pin 7) is amplified to Vline (pin 16) with the gain Gs (long line) or 6dB lower (shorter lines) depending on AGC control (see paragr. 4). In sending mute condition (V 14 > 1.6V) these gains are reduced of at least 60dB. In the same condition, DTMF input (pin 6) is activated, with gain Gmf to the line independent from Iline lenght. 2.4 Antisidetone Buffer The signal coming from the sending preamplifier is internally presented at pin 4 and than buffered to pins 1 and 2 for sidetone cancellation (see paragraph 3.2).
Figure 3
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2.5 Soft Clipping To avoid distortion on line, the TEA7063 has a "soft clipping" on transmit channel. The resistor (Rsoft) on pin 10 fixes the maximum AC peak dynamic on the line: VSTL VSTL(Vp) = Vpin16(DC) -1.44 * Figure 4 Rsoft ( pin 10 ) R9 ( pin 8 ) where Rsoft 470mV 1V IST = 2 R9 (pin8) IST
The capacitor (C10) and the resistor (R10) connected on pin 11 fixe the constant time of the soft clipping. Recommended values: C10 = 150nF; R10 = 560K
Figure 5: Transmit Curves
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The equivalent balancing impedance is given by the formula: ZAL = K * ZALS + (1 - K) * ZALL where: -K = 0 at ILINE = ILL or lower (long line) -K varies linearly from 0 to 1 with Iline between ILL and ILS -K = 1 at ILINE = ILS or higher (short line).. Calculations to define ZALL and ZALS are: a) Zline ( long ) Zext Zint Zout ZALL = 70 * R5 * Zout b) Zline ( short ) Zext Zint Zout ZALL =70* R5 * Zout where: - Zext = R6//C4//(Zelectret) (at pin 13) - Zint = 10K//8.5nF (internal impedance) - Zout = 10.65 * Z4 (at pin 3; see paragr. 2.2) - Zline (short) and (long) are the impedances of the line at minimum and naximum line lenght - R5 = 5.1K 1% (typically) 3.3 AC Impedance The total AC impedance of the circuit to the line is: ZAC = Zout//Zint//Zext (ZALS, ZALL >>ZAC) 3.4 Receive Mute (and confidence level) When the receive channel is muted (Vpin 14 > 2.7V) the receive gain is reduced of 60dB minimum.
3. RECEIVE CHAIN 3.1 A.G.C. In Receive As described for the transmission chain, also the receiving gains Gr, from pins 1 and 2 to pin 20, have a reduction of 6dB when Iline moves from ILL to ILS (see also paragr. 4). 3.2 Sidetone Compensation The circuit is provided with a double anti-sidetone network to optimize both at long and short lines. In case double antisidetone network is not requested by the application needs, pins 1 and 2 can be connected to each other and 5 external passive components can be saved (ZALL and ZRL). Before entering pins 1 and 2, the received signal is areduced by the two attenating networks: - ZALL/ZRL to pin 1 for long lines sidetone compensation, - ZALS/ZRS to pin 2 for short lines sidetone compensation. ZRL and ZRS define the total receive gains: a) b) V20 ZRS = ( Gr - 6dB ) * for short lines V16 ZRS + ZALS ZALL and ZALS define the sidetone compensation of the circuit. Figure 6 V20 ZRL = Gr * for long lines V16 ZRL + ZALL
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In this condition an internal connection is activated from line DTMF output (pin 16) to Receive Output (pin 20) with an attenuation GRS = 38.5dB to provide acoustic feedback of the DTMF emission. 4. A.G.C AND SIDETONE PROGRAMMING 4.1 Programmable Controls AGC and sidetone attack and disonnect points (or currents) are programmable externally through two independents pins, I-start (pin 9) and I-slope (pin 15). 4.2 I-Start (pin 9) An external resistor RLL connected between Istart (pin 9) and Microprocessor Supply (pin 19) controls the attack point of AGC and ZAL (antisidetone Z). ILL is the line current at which the control starts. Formulas for ILL and RLL with R9 = 100K are: 2880 ILL = + 11mA RLL 2880 RLL = ( ILL - 11mA ) 4.3 I-Slope (pin 15) An external resistor RLS connected between I-slope (pin 15) and Microprocessor Supply (pin 19) controls the disconnected point of AGC and Figure 7 ZAS (antisidetone Z). ILS is the line current at which the control stops. Formulas for ILS and RLS with R9 = 100K are: 4680 + ILL; RLS 4680 RLS = ( ILS - ILL ) ILS = 4.4 A.G.C. OFF (pin 9 and 15) Programming ILL and ILS respectively higher than 70mA and 450mA is forcing the IC in AGC OFF Condition. Suggested external components are: RLL = 51K and RLS = 10K In this case sending, receiving gain and sidetone compensation are independent of the line lenght. Pins 1 and 2 can be connected to each other saving 5 passive external components at pin 2. 4.5 Secret Function for Private (pin 14) The two separate thresholds for sending and Receiving Mute (pin 14) allow "Secret Function" (only microphone muted). Pin 14 can be set: a) between 0.25V and 0.8V for speech mode, b) between 1.6V and 2.1V for "secret" mode (microphone muted), c) between 2.7V and 3.3V for "all muted" mode
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5. MICROPROCESSOR INTERFACE 5.1 Microprocessor Supply (pin 19) At "off-hook" the first priority of the circuit is to make some current available at the Microprocessor Supply (pin 19) to charge quickly the external capacitor C2. This charging current is Icpm = 0.6 * ILINE T-charge of about 10ms is necessary, with C2 = 47/F. to charge pin 19 at the specified value of 3.3V typical at ILINE = 25mA: T-charge = Figure 8 3.3V * C2 typically 0.6 * ILINE Vmp = 3.3V in normal operation and current increases linearly from 0.5mA min, at ILINE = 6mA, to1.5mA, at ILINE = 25mA, remaining stable for higher values of ILINE. (with R9 = 100K) In general: Imp = 130Volt + 0.3mA at IL > 25mA R9 11Volt + 0.3mA at IL > 6mA R9
Imp =
A zener of 3.9V typical is generally suggested to
6. CURRENT SOURCE FOR SPEAKERPHONE 6.1 Current Source (pin 12) Most of the DC current available from the line is delivered by the speech circuit at the output Isource (pin 12) through an internal current generator. Typical values of this current, lLS with R9 = 100K, are: ILS = (0.3 * ILINE) for I LINE < 16.5mA ILS = (0.9 * ILINE -10mA) for ILINE > 16.5mA (ex: ILINE = 16mA then ILS = 5mA Figure 9
ILINE = 30mA then ILS = 17mA ILINE = 60mA then ILS = 44mA). The voltage level at pin 12 must be defined by an external regulator (i.e.: zener) and, if necessary, filtered with a capacitor (47 to 220F). In case VLINE (at pin 16) approaches voltage at pin 12, then the internal current source switches off and its DC current is shunt to ground through and internal complementary generator, thus avoiding any negative effect on the AC and DC impedances of the telephone set application.
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7. INTERNAL DESCRIPTION OF CURRENT MANAGEMENT 7.1 Internal Power Supply Management R9 fixes the line power supply management. R9 fixes the values of: Iear, Iup, Iref and ILS. A current line information is used to modifie the values of Iear, Iup, Iref and ILS between a minimum and a maximum values. On Fig 10: The transmit output stage is represented by a current source (Itr). The I tr value depends of the DC voltage on VLINE (pin 16) and RZAC value. The other internal stages connected to VLINE (pin 16) are represented by a constant 1.3mA current source. 7.2 DC Characteristics (internal) The DC characteristic is equals to: VLINE (pin 16) = VC (pin 17) + R6 * Iint Iint is the sum of all the current sources connected on VC (pin 17): [Ip + Iref + Vpin17 / (r7 + r8)] - Ip is the bias internal operational amplifiers power supply. - Iref = 1 / 3 * (Vrefi / R9); with Vrefi = 470mV - Iref = 156 / R9 mA The current line information changes Iint value; at low line current (6mA): Iint = 4V / R9 + 60A at low line current (IL = ILb): Iint =8V / R9 + 60A 7.3 Microcontroller Supply (internal) Iup = [(p2 / r2) * Iref + 0.3] mA = [(p2 / r2) * 156 / R9) + 0.3] mA The current line information changes p2/r2 value; at low line current (6mA): p2 / r2 = 70 at a line current (IL = ILb): p2 / r2 = 820 7.4 Earphone Current Supply (internal) Iear = (p1 / r1) * Iref mA = (p1 / r1) * (156 / R9) mA The current line information changes p1/r1 value; at low line current (6mA): (p1 / r1) = 200 at a line current (IL = ILb): p1 / r1 = 2700 The maximum peak dynamic on the earphone is: Vpear = Zear * Iear 7.5 Transmit Output Stage (internal) The output stage bias current depends of the DC voltage on pin 16 and on RZAC impedance. 0.1425 * VLINE - 0.517 (RZ is the resistor Itr = RZ connected betwee pin3 and the ground) 7.6 Loudspeaker Current Source (internal) The current source for external peripherals has two slopes: - First slope; before Iear, Iup, Itr and Iint are stabilized at their maximum values: (IL = ILb) ILS = 0.285 * IL - Second slope; after Iear, Iup, Itr and Iint are stabilized at their maximum values: (for IL > ILb) (ILS) = 0.91 * (ILINE Iear, Iup, Itr and Iint are stabilized at their maximum values between 16 and 26mA, the absolute IL value depends of R9 value. The line current (ILb) where Iear, Iup, Itr, Iint are stabilized at their maximum values and where the slope of ILS change is: Iear + Iup + Itr + Iint + 1.3 ILb = 0.715 7.7 Numerical Example 1) R9 = 100K; R6 = 25K DC characteristic = 6V for Iint max: = 5V for Iint min: Iint min (IL = 6mA) = 4 /100K + 60 = 100A Iint min (IL = ILb) = 8 /100K + 60 = 140A Vpin17 = 2.5V R6 = 25K Vpin16 min (IL = 6mA) = 2.5 + 25 * 100E - 3 = 5V Vpin16 max (IL = ILb) = 2.5 + 25 * 140E - 3 = 6V Current Sources Iup min (IL = 6mA) = 0.4mA Iup max (IL = ILb) = 1.6mA Iear min (IL = 6mA) = 0.3mA Iear max (IL = ILb) = 4.2mA with RZ = 75 Itr min (IL = 6mA) = 2.6mA Itr max (IL = ILb) = 4.5mA ILS min (IL = 6mA) = 1.3mA ILb 1.6 + 4.2 + 4.5 + 0.14 + 1.3 ILb = mA 0.715 ILb = 16.5mA ILS (for IL = ILb) = 0.285 * ILb = 4.7mA at IL = 100mA: (ILS) = 0.91 * (IL) = 0.91 * (100 - 16.5) = 76mA ILS = 4.7 + 76 = 80.7mA 2) R9 = 56K; R6 = 18K DC characteristic = 6.1V for Iint max: = 4.8V for Iint min:
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TEA7063
Iint min (IL = 6mA) = 4 /56K + 60 = 130A Iint min (IL = ILb) = 8 /56K + 60 = 200A Vpin17 = 2.5V R6 = 18K Vpin16 min (IL = 6mA) = 2.5 + 18 * 130E - 3 = 4.85V Vpin16 max (IL = ILb) = 2.5 + 18 * 200E - 3 = 6.1V Current Sources Iup min (IL = 6mA) = 0.5mA Iup max (IL = ILb) = 2.5mA Iear min (IL = 6mA) = 0.55mA Iear max (IL = ILb) = 7.5mA with RZ = 75 Figure 10: Line Power Supply Management Itr min (IL = 6mA) = 2.35mA Itr max (IL = ILb) = 4.5mA ILS min (IL = 6mA) = 1.17mA ILb 2.5 + 7.5 + 4.5 + 0.2 + 1.3 ILb = mA 0.715 ILb = 22.4mA ILS (for IL = ILb) = 0.285 * ILb = 6.4mA at IL = 100mA: (ILS) = 0.91 * (IL) = 0.91 * (100 - 22.6) = 64mA ILS = 6.4 + 64 = 70.4mA
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SO20 PACKAGE MECHANICAL DATA
DIM. Min. A a1 a2 b b1 C c1 D E e e3 F L M S 7.4 0.5 12.6 10 1.27 11.43 7.6 1.27 0.75 8 (max.)
o
mm Typ. Max. 2.65 0.1 0.2 2.45 0.35 0.23 0.5 45o (typ.) 13.0 10.65 0.496 0.394 0.49 0.32 0.014 0.009 0.004 Min.
inch Typ. Max. 0.104 0.008 0.096 0.019 0.013 0.020
0.510 0.419 0.050 0.450
0.291 0.020
0.300 0.050 0.030
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DIP20 PACKAGE MECHANICAL DATA
DIM Min. a1 B b b1 D E e e3 F i L Z 3.3 1.34 8.5 2.54 22.86 7.1 3.93 0.130 0.053 0.254 1.39 0.45 0.25 25.4 0.335 0.100 0.900 0.280 0.155 1.65 mm Typ. Max. Min. 0.010 0.055 0.018 0.010 1.000 0.065 inch Typ. Max.
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Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A.
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